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Panel Session: Adaptive / Evolvable Reconfigurable Computing Systems

Prof. Luigi Carro

Adaptive Processing Architectures for the Ultimate Scaling of the CMOS World

Prof. Luigi Carro, Universidade Federal do Rio Grande do Sul (UFRGS), Brazil

Abstract:

As technology scaling reaches the physical limits of silicon, several new problems must be addressed, from the design of low-power but high performace circuits, to the reliability issue of weak transistors and the integration of mixed technologies (nanowrires, SET, etc). New architectural solutions that explore parallelism at different granularities must be sought, not only for performance/energy trade-offs, but also as a means to assure reliability, fault tolerance and increased yield. In this paper we propose an adaptive mechanism that can at the same time provide reliability, yield enhancement and extra performance, at low energy levels. The proposed solution is based on the idea of exploring the concept of regularity, together with a mix of agressively scaled circuits and some larger but reliable devices. Experimental results show that the proposed architecture can accelerate from dataflow applications to complex control flow ones like the Linux operating system.

BIO:

Luigi Carro was born in Porto Alegre, Brazil, in 1962. He received the Electrical Engineering and the MSc degrees from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil, in 1985 and 1989, respectively. From 1989 to 1991 he worked at ST-Microelectronics, Agrate, Italy, in the R&D group. In 1996 he received the Dr. degree in the area of Computer Science from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil. He is presently a professor at the Applied Informatics Department at the Informatics Institute of UFRGS, in charge of Computer Architecture and Organization disciplines at the undergraduate levels. He is also a member of the Graduation Program in Computer Science at UFRGS, where he is co-responsible for courses on Embedded Systems, Digital signal Processing, and VLSI Design. His primary research interests include embedded systems design, validation, automation and test, fault tolerance for future technologies and rapid system prototyping. He has published more than 150 technical papers on those topics and is the author of the book Digital systems Design and Prototyping (2001-in portuguese) and co-author of Fault-Tolerance Techniques for SRAM-based FPGAs (2006-Springer).


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