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Chairs:

David Andrews* and Christian Plessl**
*Univ. of Kansas, USA
** Paderborn Center for Parallel Computing
University of Paderborn, Germany

Abstract

Since the inception of reconfigurable computing researchers have sought new approaches to exploit the ability to form customized processor and computational units within the hardware fabric. Early approaches were constrained by limited gates, and focused mainly on creating a single static accelerator created during the initial system design or compilation phase. The introduction of platform FPGAs has now widened the design spectrum and allow multiprocessor systems on chip architectures. Recent efforts have produced a wide spectrum of architectures for platform FPGAs, such as multiple CPUs augmented with reconfigurable data-path units, attached fine or coarse grained co-processors, specialized SIMD vector units, or multi-core systems with customized cores and interconnect. Reconfigurable computing is now witnessing new capabilities in both software and hardware dynamic reconfiguration that allow systems to be customized and reprogrammed during run time.

This session will focus on research related to the architecture, design tools, and runtime systems for customizable processors. Topics of interest include:

• architectures, tools, and runtime systems for static and dynamic processor customization
• application-specific multi-core systems
• programming models for dynamic adaptation of applications

BIOs

Session E1:
Invited Speakers

• ERSA Keynote
  Effective integration of FPGAs into commercial high-performance computing (HPC) applications
  Tony Brewer, CTO, Convey Computer
• Configurable Processor Architectures: History and Trends
  David Andrews* and Christian Plessl**
  * Univ. of Kansas, USA
  ** University of Paderborn, Germany
• Reconfigurable Architecture for Distributed Smart Cameras
  Christophe Bobda, Ali Akbar Zarezadeh, Felix Muhlbauer, Robert Hartmann and Kevin Cheng
  University of Potsdam, Germany
• Single-threaded Performance and MultiCores
  Alessandro Forin, Microsoft Research

Session E3:
Regular papers

• An Automated Scheduling and Partitioning Algorithm for Scalable Reconfigurable Computing Systems
  Casey Reardon, Alan D. George, Greg Stitt, and Herman Lam
  University of Florida, USA
• Integrating Application Specification and Performance Prediction for Strategic Design-Space Exploration
  Brian Holland and Alan D. George and Herman Lam
  University of Florida, Gainesville, FL, USA
• Distinguished Paper
  Architecture of an FPGA-Oriented Heterogeneous Multi-core Processor with SIMD-Accelerator Cores
  Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama
  Tohoku University, Japan

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